Data storage device and method for performing error recovery
US12235721B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 6, 2023 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | Jul 6, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0793
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data storage device includes at least one signal processing circuit to perform an error recovery procedure when an error has occurred in the data storage device. When performing the error recovery procedure, the signal processing circuit determines which type of line reset is to be performed according to a device identifier. When the device identifier satisfies a predetermined condition, the signal processing circuit performs an operation of periodic line reset to repeatedly transmit a line reset signal to the peer device in a predetermined period until the predetermined period expires or another line reset signal representing an acknowledgment of the line reset signal is received from the peer device; and when the device identifier does not satisfy the predetermined condition, the signal processing circuit performs an operation of one-shot line reset to transmit the line reset signal to the peer device for only one time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.