Reverse engineering detection by counting consecutive incremental branch instructions in an instruction register of a processor
US12236000B2 · kind B2 · utility
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21Claims
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Key dates
| Filing date | Dec 16, 2021 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | Jun 2, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method for detecting the linear extraction of information in a processor using an instruction register for storing an instruction including an operation code. The method includes monitoring the instructions successively stored in the instruction register including decoding the operation codes, determining the number of consecutive operation codes encoding incremental branches, and generating a detection signal if the number is greater than or equal to a detection threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.