Processor for performing a predetermined computational operation, and processing unit
US12236136B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2023 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | May 18, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/506
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor for performing a predetermined computational operation in which one or multiple data element(s) is/are used to determine a result. The processor includes one or more processor core(s) and at least one buffer memory, connectable to a main memory, and if the main memory is connected, it is designed to access the main memory. Each processor core is designed to execute instructions. The at least one buffer memory includes a calculation circuit which is designed to perform the computational operation in response to an execution signal if the one or the multiple data element(s) is/are stored in the buffer memory, the result being stored in the buffer memory. The processor is designed to perform the computational operation optionally using one of the processor cores with the aid of the instructions or to perform it in the at least one buffer memory using the respective calculation circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.