Shift register for display gate driver with silicon and oxide semiconductor transistors
US12236891B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 4, 2023 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | Jan 4, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
This application provides a shift register, a gate drive circuit, a display panel, and an electronic device. The shift register includes: a node control module, electrically connected to a first level signal receive end that receives a low level, a second level signal receive end that receives a high level, a first clock signal end, a second clock signal end, a first node, and a second node; an input module, electrically connected to the second clock signal end, a trigger signal input end, and the second node; a voltage regulator module, electrically connected to the second node, a third node, and the second clock signal end; and an output module, electrically connected to the first level signal receive end, the second level signal receive end, a drive signal output end, the first node, and the third node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.