Data receiving circuit, data receiving system and memory device
US12237042B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 26, 2022 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | Jun 14, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is data receiving circuit, data receiving system and memory device. The data receiving circuit includes: first amplification circuit, configured to receive data signal, first reference signal and second reference signal, perform first comparison on the data signal and the first reference signal in response to sampling clock signal and output first signal pair, and perform second comparison on the data signal and the second reference signal and output second signal pair; second amplification circuit, configured to receive enable signal and feedback signal, selectively receive the first signal pair or the second signal pair as input signal pair based on the feedback signal during period in which the enable signal is at first level, receive the first signal pair during period in which the enable signal is at second level, amplify voltage difference of the first signal pair, and output first output signal and second output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.