Semiconductor memory devices having efficient serializers therein for transferring data
US12237049B2 · kind B2 · utility
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12References
19Claims
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Key dates
| Filing date | Nov 7, 2022 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | May 4, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/107
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit memory device includes a serializer configured to convert a plurality of bits of parallel read data, which are synchronized with a corresponding plurality of clock signals that are out-of-phase relative to each other, into a serial stream of the read data. This conversion is performed using a Boolean logic circuit, which is configured to receive each of the plurality of bits of parallel read data and each of the plurality of out-of-phase clock signals at corresponding inputs thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.