Integrated circuit device
US12237324B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2022 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | May 19, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device according may include a plurality of gate structures embedded in a substrate, a direct contact on the substrate between the plurality of gate structures, and a bit line electrode layer on the direct contact. The bit line electrode layer has a thickness of about 10 nm to 30 nm. The bit line electrode layer may include a molybdenum tungsten (MoW) alloy including molybdenum (Mo) a range of about 25 at % to about 75 at %.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.