Photonic communication platform and related methods for increasing yield
US12237871B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2023 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | Sep 16, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B6/3596
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Photonic interposers that enable low-power, high-bandwidth inter-chip (e.g., board-level and/or rack-level) as well as intra-chip communication are described. Described herein are techniques, architectures and processes that improve upon the performance of conventional computers. Some embodiments provide photonic interposers that use photonic tiles, where each tile includes programmable photonic circuits that can be programmed based on the needs of a particular computer architecture. Some tiles are instantiations of a common template tile that are stitched together in a 1D or a 2D arrangement. Some embodiments described herein provide a programmable physical network designed to connect pairs of tiles together with photonic links.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.