Biasing circuit providing bias voltages based transistor threshold voltages
US12242295B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 7, 2021 |
| Grant date | Mar 4, 2025 |
| Priority date | — |
| Expiry date | Sep 12, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/468
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
This application is directed to a bias circuit. The bias circuit includes a biasing voltage reference circuit including at least a first transistor. The biasing voltage reference circuit is configured to output a first voltage that depends on a threshold voltage of the first transistor. The bias circuit also includes a differential input circuit coupled to the biasing voltage reference circuit and having two differential inputs. The differential input circuit is configured to receive the first voltage and a reference voltage and generate a second voltage based on a difference between the first voltage and the reference voltage. The bias circuit further includes a buffer circuit coupled to the differential input circuit. The buffer circuit is configured to receive the second voltage and generate a bias voltage based on the second voltage. The bias voltage depends on the threshold voltage of the first transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.