Power management circuit and system thereof
US12242320B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 28, 2021 |
| Grant date | Mar 4, 2025 |
| Priority date | — |
| Expiry date | Aug 3, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7842
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power management circuit and system thereof are provided. The power management circuit includes M×N computing units, a first power supply unit, a second power supply unit and N−1 connection interfaces. M and N are both natural numbers greater than 1. The first power supply unit supplies power to the computing units of the Nth row, the computing units of the Nth row supply power to the computing units of the (N−1)th row, respectively, and correspondingly to computing units of subsequent rows until the computing units of the 2nd row supply power to the computing units of the 1st row, respectively. The second power supply unit supplies power to the M×N computing units, and the N−1 connection interfaces coupled to corresponding computing units of the 1st column of the M×N computing units, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.