Transparently attached flash memory security
US12242739B2 · kind B2 · utility
0Cited by
5References
1Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2024 |
| Grant date | Mar 4, 2025 |
| Priority date | — |
| Expiry date | Apr 30, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes an interface circuit and a monitor circuit communicatively coupled to the interface circuit. The monitor circuit is configured to identify a command issued to a memory communicatively coupled to the monitor circuit through the interface circuit, determine whether the command is authorized, and, based on a determination that the command is not authorized, cancel the command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.