Semiconductor device, memory system and method of controlling semiconductor device thereof
US12243606B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2021 |
| Grant date | Mar 4, 2025 |
| Priority date | — |
| Expiry date | Jul 29, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a memory die, a non-volatile memory circuit, and a logic die. The memory die includes a first memory space and a second memory space. The non-volatile memory circuit stores a repair table file corresponding to the first memory space. The logic die is coupled to the memory die and the non-volatile memory. The logic die selectively accesses the first memory space or the second memory space of the memory die according a comparing result of an input address and the repair table file. The memory die and is different from the logic die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.