Wirebondable interposer for flip chip packaged integrated circuit die
US12243840B2 · kind B2 · utility
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4References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2020 |
| Grant date | Mar 4, 2025 |
| Priority date | — |
| Expiry date | Jul 24, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B10/808
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A variety of methods and arrangements to convert a flip chip IC die package into a wirebondable component using an interposer are described. The interposer has an insulating layer and a patterned metal layer attached to one side of the insulating layer. The patterned metal layer is electrically connected to the IC die using solder bumps. The interposer has wirebond pads on a side of the interposer opposed to the side of the interposer having the electrical connection between the IC die and solder bumps. The interposer may be a thin organic laminate or a flexible printed circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.