Silicon carbide semiconductor device with overlapping electric field relaxation regions and method of manufacturing the same
US12243910B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2022 |
| Grant date | Mar 4, 2025 |
| Priority date | — |
| Expiry date | May 6, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/481
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon carbide semiconductor device includes an electric field relaxation layer disposed in a drift layer. The electric field relaxation layer includes a first region having a second conductivity type and disposed at a position deeper than trenches, and a second region having the second conductivity type and disposed between the adjacent trenches to be away from a side surface of each of the adjacent trenches. Each of the first region and the second region is made of an ion implantation layer. The electric field relaxation layer further includes a double implantation region in which the first region and the second region overlap with each other, and the electric field relaxation layer has a peak of a second conductivity type impurity concentration in the double implantation region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.