Differential input receiver circuit testing with a loopback circuit
US12244331B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2022 |
| Grant date | Mar 4, 2025 |
| Priority date | — |
| Expiry date | Aug 30, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2856
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A low voltage differential signaling (LVDS) receiver includes a receiver circuit including first and second inputs coupled to first and second conductive pads, respectively, and an output coupled to an input of a digital controller, and a dummy transmitter circuit including a first input coupled to receive a common mode voltage (VCM) tune signal, a second input coupled to a loopback input signal, a third input coupled to a loopback enable signal, a first output coupled to the first input of the receiver circuit, and a second output coupled to the second input of the receiver circuit. When a test mode of operation is enabled, the digital controller asserts the loopback enable signal, and the dummy transmitter circuit generates a pair of test differential signals based on the VCM tune signal, wherein the VCM tune signal varies to test the LVDS receiver over a range of common mode voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.