Semiconductor device
US12244954B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 21, 2022 |
| Grant date | Mar 4, 2025 |
| Priority date | — |
| Expiry date | Sep 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/18
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor device. The semiconductor device includes a first counter latch circuit configured to receive a count code and to latch the count code according to a comparison result signal; and a second counter latch circuit configured to receive the count code from the first counter latch circuit, and to latch the count code by using a plurality of first latches. The first latches are coupled in series to each other and are configured to operate to sequentially bypass values transmitted to the respective first latches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.