Systems and methods for lane management in a communication bus
US12248422B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 9, 2023 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | Aug 4, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4273
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and method for lane management in a communication bus are disclosed. In one aspects, a communication link or bus between a baseband processor (BBP) and a radio frequency integrated circuit (RFIC) may include multiple uplink lanes for transmission and multiple downlink lanes for reception that are frequency constrained and adjust bandwidth by adjusting duty cycles on the lanes. To reduce power consumption by the communication bus, exemplary aspects of the present disclosure contemplate using in-band signaling to turn off lanes selectively during inactive periods such that the lanes do not duty cycle in tandem with active lanes. Additionally, in some aspects, the uplink lanes may be continuously active during transmission while the downlink lanes are turned off. This dynamic lane usage reduces power consumption, does not require additional pins for sideband signaling, and does not introduce any additional latency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.