Non-volatile memory device optimized for a surface mount technology (SMT) process and an operating method thereof
US12248684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2022 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | May 24, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An operating method of a non-volatile memory device, the method including: receiving a program command from an external device; determining an operating mode in response to the program command; when the operating mode is a surface mount technology (SMT) mode, performing an initial program operation in which a plurality of memory cells are programmed through a plurality of steps to form a first threshold voltage distribution; and when the operating mode is a normal mode, performing a normal program operation in which the plurality of memory cells are programmed through a single step to form a second threshold voltage distribution, wherein the first threshold voltage distribution is narrower in width than the second threshold voltage distribution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.