Data transmission circuit, data transmission method and storage device
US12249398B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2021 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | Aug 12, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/222
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a data transmission circuit, a data transmission method, and a storage device. The data transmission circuit includes a controllable delay module and a mode register data processing unit. The controllable delay module is configured to generate a delayed read command in response to a mode register read command. The mode register data processing unit is configured to read setting parameters from a mode register in response to the mode register read command, and to output the setting parameters in response to the delayed read command. Here, a time difference between a start moment of outputting of the setting parameters and a moment when the controllable delay module receives the mode register read command is a first preset threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.