Enhancement-mode high-electron-mobility transistor
US12249644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2019 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | Sep 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
Abstract
An enhancement-mode high-electron-mobility transistor comprises a structure including a stack made of III-V semiconductor materials defining an interface and capable of forming a conduction layer in the form of a two-dimensional electron gas layer; a source electrode and a drain electrode forming an electrical contact with the conduction layer; and a gate electrode arranged on top of the structure, between the source electrode and the drain electrode. The structure comprises a bar that is arranged below the gate electrode and passes through the interface of the stack. The bar comprises two semiconductor portions exhibiting opposite types of doping, defining a p-n junction in proximity to the interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.