Apparatus and method for wideband multi-phase clock generation
US12249990B1 · kind B1 · utility
0Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2023 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | Nov 15, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0807
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Aspects of the subject disclosure may include, for example, an inner clock generation circuit, including: a selectable frequency divider having: a ring of tri-state inverters; a reset gate on an output of each tri-state inverter in the ring; and a reset circuit comprising one or more selectable flip-flops; and a duty-cycle limiter that generates clock signals having a 25% duty cycle from three out of four quadrature clock signals. Other embodiments are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.