Front-end for receivers with RF sampling ADCS
US12250015B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2022 |
| Grant date | Mar 11, 2025 |
| Priority date | — |
| Expiry date | May 19, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/1638
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Front-end circuitry is difficult to design for high sample rate, wide bandwidth receivers with high performance requirements on noise and linearity. One exemplary front-end circuitry is integrated on-chip with the RF ADC in a receiver, and the circuitry implements ESD protection, attenuation, and gain. The circuitry includes a multi-tap filter with LC circuits, and the filter implements a highly linear filter. Advantageously, the capacitors in the LC circuits are also used for ESD protection. Additionally, tunable attenuator cells are implemented across the multi-tap filter to provide a wide range of variable attenuation. The circuitry can further include a fixed or variable gain stage at the output. The resulting circuitry offers variable gain and attenuation while meeting bandwidth, noise, and linearity requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.