Inference calculation for neural networks with protection against memory errors
US12253918B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2021 |
| Grant date | Mar 18, 2025 |
| Priority date | — |
| Expiry date | Apr 20, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/0464
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a hardware platform for the inference calculation of a layered neural network. In the method: a first portion of input data which are required for the inference calculation of a first layer of the neural network and redundancy information relating to the input data are read in from an external working memory into an internal working memory of the computing unit; the integrity of the input data is checked based on the redundancy information; in response to the input data here being identified as error-free, the computing unit carries out at least part of the first-layer inference calculation for the input data to obtain a work result; redundancy information for the work result is determined, based which the integrity of the work result can be verified; the work result and the redundancy information are written to the external working memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.