Nanowire-based interconnects for sub-millimeter wave integrated circuit applications
US12255108B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 17, 2022 |
| Grant date | Mar 18, 2025 |
| Priority date | — |
| Expiry date | May 12, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1078
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A device includes a substrate and at least one electrically conducting portion supported by the substrate, the at least one electrically conducting portion including a signal line and a ground plane electrically isolated from the signal line. The electrically conducting portion includes a layer of a first electrically conducting material and a layer of a metal oxide material including anodic aluminum oxide (AAO) and one or more nanowires (NW) of a second electrically conducting material each formed within a corresponding pore extending through the AAO from a first side of the layer to a second side of the layer of the metal oxide material opposite the first side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.