Clock synchronization NIC offload
US12255734B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2022 |
| Grant date | Mar 18, 2025 |
| Priority date | — |
| Expiry date | Mar 6, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0667
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a system includes a network interface controller including a device interface to connect to a processing device and receive a time synchronization marker message from an application running on the processing device, a network interface to send packets over a network, and packet processing circuitry to process the time synchronization marker message for sending via the network interface over the network to a slave clock device, generate a time synchronization follow-up message including a timestamp indicative of when the synchronization marker message egressed the network interface, and process the time synchronization follow-up message for sending via the network interface over the network to the slave clock device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.