Methods and apparatuses for implementing high-speed cryptographic computation based on software-hardware collaboration, and electronic devices
US12255981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2024 |
| Grant date | Mar 18, 2025 |
| Priority date | — |
| Expiry date | Jun 14, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/06
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides methods and apparatuses for implementing high-speed cryptographic operations based on software-hardware collaboration, and electronic devices. In the embodiments of the present disclosure, by analyzing software and hardware computing resources in real-time, the cryptographic device driver allocates the one or more target resources for cryptographic computation to the reference data packets. When the one or more target resources include the target cryptographic device, the cryptographic device executes, according to the characteristics of the target cryptographic algorithm used to perform cryptographic computation on the reference data packet, the acceleration operation corresponding to the target cryptographic algorithm for the cryptographic computation on the reference data packets, such as grouping the reference data packets, to improve a concurrent execution rate of an algorithm and cope with situations with a large amount of service concurrency and data processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.