Automatic assignment of device debug communication pins
US12259705B2 · kind B2 · utility
0Cited by
1References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2021 |
| Grant date | Mar 25, 2025 |
| Priority date | — |
| Expiry date | Mar 30, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/33297
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An apparatus includes a debugger circuit, debug pins, and a test controller circuit. The test controller circuit is configured to, in a programming mode, determine a subset of the debug pins used in programming the apparatus. The test controller circuit is further configured to save a designation of the subset of the debug pins. The test controller circuit is further configured to, in a test mode subsequent to the programming mode, use the designation to route the subset of the debug pins used in programming the apparatus to the debugger circuit for debug input and output with the server.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.