Systems, methods, and apparatuses for matrix add, subtract, and multiply
US12260213B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2021 |
| Grant date | Mar 25, 2025 |
| Priority date | — |
| Expiry date | Dec 10, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments detailed herein relate to matrix operations. In particular, support for matrix (tile) addition, subtraction, and multiplication is described. For example, circuitry to support instructions for element-by-element matrix (tile) addition, subtraction, and multiplication are detailed. In some embodiments, for matrix (tile) addition, decode circuitry is to decode an instruction having fields for an opcode, a first source matrix operand identifier, a second source matrix operand identifier, and a destination matrix operand identifier; and execution circuitry is to execute the decoded instruction to, for each data element position of the identified first source matrix operand: add a first data value at that data element position to a second data value at a corresponding data element position of the identified second source matrix operand, and store a result of the addition into a corresponding data element position of the identified destination matrix operand.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.