Methods and apparatus to implement parallel architectures for neural network classifiers
US12260630B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2021 |
| Grant date | Mar 25, 2025 |
| Priority date | — |
| Expiry date | Jan 9, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V10/806
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, apparatus, systems, and articles of manufacture are disclosed to implement parallel architectures for neural network classifiers. An example non-transitory computer readable medium comprises instructions that, when executed, cause a machine to at least: process a first stream using first neural network blocks, the first stream based on an input image; process a second stream using second neural network blocks, the second stream based on the input image; fuse a result of the first neural network blocks and the second neural network blocks; perform average pooling on the fused result; process a fully connected layer based on the result of the average pooling; and classify the image based on the output of the fully connected layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.