Memory core characteristic screening method and system thereof
US12260930B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2022 |
| Grant date | Mar 25, 2025 |
| Priority date | — |
| Expiry date | Jun 15, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/50012
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory core characteristic screening method includes the following steps. A command signal transmitting step includes configuring a processing module to transmit a command signal to a memory device. A first internal operating step includes configuring the memory device to operate a first operation to one of a word line, a bit line pair and a column line after a first strobe signal delay time according to a first command. A second internal operating step includes configuring the memory device to operate a second operation to another one of the word line, the bit line pair and the column line after a second strobe signal delay time according to a second command. A memory core characteristic screening step includes screening a memory core characteristic by shorting a timing between the first strobe signal delay time and the second strobe signal delay time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.