Patent · US Active

Method for fabricating semiconductor structure, semiconductor structure, and memory

US12262522B2 · kind B2 · utility

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15Claims
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Key dates

Filing dateJun 16, 2022
Grant dateMar 25, 2025
Priority date
Expiry dateAug 10, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/01

Abstract

Embodiments provide method for fabricating a semiconductor structure, and a semiconductor structure. The method includes: providing a substrate, a thin-film stack structure being formed on the substrate; forming a first groove and a second groove in the thin-film stack structure, and forming write transistors in the first groove, the second groove extending along a first direction, and the second groove being positioned between adjacent two of the write transistors in a second direction; removing a part of the thin-film stack structure by etching using the second groove to form a first hole and a second hole respectively, forming a write word line in the first hole, and forming a write bit line in the second hole; forming a first via on an upper surface of the thin-film stack structure, and forming a storage node in the first via; and forming a read transistor, a read bit line and a lead.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.