Compression-based scan test system

US12265121B2 · kind B2 · utility

Assignee

• STMicroelectronics International N.V. · NL

Inventors

• Sandeep Jain · Milpitas, US
• Shalini Pathak · Bhangrola, IN
• Prateek Singh · Jersey City, US

Key dates

• Filing date: May 23, 2023
• Grant date: Apr 1, 2025
• Expiry date: May 23, 2043

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/318552
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

In accordance with an embodiment, a method for operating a Pseudo-Random Pattern Generator (PRPG) based scan test system includes: generating test patterns using a Pseudo-Random Pattern Generator (PRPG), generating the test patterns including clocking the PRPG using a first clock signal; loading the test patterns into a plurality of scan chains coupled to the PRPG; modifying a bit distribution of the generated test patterns with respect to the plurality of scan chains by freezing at least one clock cycle of the first clock signal while a second clock signal is active or freezing at least one clock cycle of the second clock signal while the first clock signal is active; shifting the loaded test patterns using the second clock signal; applying the test patterns to a circuit under test (CUT) through the plurality of scan chains; and capturing response patterns generated by the CUT in the plurality of scan chains.