Universal test chiplet

US12265123B1 · kind B1 · utility

Assignees

• NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS · CN
• NANTONG INSTITUTE OF NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS CO., LTD. · CN

Inventors

• Zhikuang Cai · 安丰镇, CN
• Xiaoting Liu · Hangzhou City, CN
• Luping Zhang · Zhuzhou, CN
• Zixuan Wang · 安丰镇, CN
• Dapeng Yan · 安丰镇, CN
• Binbin Xu · Xi'an, CN
• Haiyan Sun · 安丰镇, CN
• Lu Liu · Chongqing, CN
• Yufeng Guo · 安丰镇, CN

Key dates

• Filing date: Sep 29, 2024
• Grant date: Apr 1, 2025
• Expiry date: Sep 29, 2044

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C29/48
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A universal test chiplet for testing a plurality of chiplets to be tested is provided. The universal test chiplet includes a chiplet test control circuit module, a test data distribution circuit module, a memory test configuration circuit module, and a chiplet test interface circuit module. The chiplet test control circuit module is configured to provide test data and configure test modes for the chiplets to be tested. The test data distribution circuit module is configured to distribute the test data required by each of the chiplets to be tested from a test data bus. The memory test configuration circuit module is configured to provide test circuits for memories of the chiplets to be tested and automatically generate a test vector. The chiplet test interface circuit module is configured to transmit the test data to the chiplets to be tested in any direction through chiplet test interfaces.