Integrated photonics and processor package with redistribution layer and EMIB connector
US12266608B2 · kind B2 · utility
0Cited by
2References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2020 |
| Grant date | Apr 1, 2025 |
| Priority date | — |
| Expiry date | May 22, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/49833
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments described herein may be related to apparatuses, processes, and techniques related to packages that include CPUs and PICs electrically coupled via an interconnect bridge. In embodiments, the PIC are electrically coupled with the EMIB using a fan out RDL to extend reach of the PIC electrical connectors. EICs may be electrically coupled between the PIC and the interconnect bridge. The CPUs may be CPUS, graphical processing units (GPUs), field programmable gate arrays (FPGAs), or other processors. Other embodiments may be described and/or claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.