Waveguide interconnects for semiconductor packages and related methods
US12266840B2 · kind B2 · utility
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22Claims
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Key dates
| Filing date | Jun 25, 2021 |
| Grant date | Apr 1, 2025 |
| Priority date | — |
| Expiry date | Aug 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06572
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Waveguide interconnects for semiconductor packages are disclosed. An example semiconductor package includes a first semiconductor die, a second semiconductor die, and a substrate positioned between the first and second dies. The substrate includes a waveguide interconnect to provide a communication channel to carry an electromagnetic signal. The waveguide interconnect is defined by a plurality of through substrate vias (TSVs). The TSVs in a pattern around the at least the portion of the substrate to define a boundary of the communication channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.