Accelerators for factorized power systems
US12267008B2 · kind B2 · utility
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Key dates
| Filing date | Aug 20, 2021 |
| Grant date | Apr 1, 2025 |
| Priority date | — |
| Expiry date | Feb 26, 2042 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The system response time of a factorized power architecture may be reduced using a high bandwidth accelerator connected in parallel with a low bandwidth switching regulator to feed one or more downstream high bandwidth current multipliers, e.g. at the point of load. The accelerator may use a high speed linear amplifier to drive the factorized bus using stored energy derived from the bus or a low voltage bias supply. The accelerator may alternatively be connected in series between the switching regulator and the downstream current multipliers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.