Voltage balance systems and methods for multilevel converters
US12267012B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2019 |
| Grant date | Apr 1, 2025 |
| Priority date | — |
| Expiry date | May 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/0074
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilevel converter system is provided. The system includes a converter and a converter controller interfaced with the converter. The converter controller includes a voltage loop, a current loop, and a voltage compensation loop. The voltage loop is configured to receive first and second voltages from the first and second segments of the converter and a reference voltage. The current loop is configured to receive a current output of the converter, a reference current, and a balancing reference current. The voltage compensation loop is configured to receive the first and second voltages and a sign signal. The converter controller is configured to generate first and second pulse-width modulation (PWM) signals using output signals from the current loop and the output compensation signals from the voltage compensation loop. The PWM signals are configured to control the switches of the converter and to balance the first voltage with the second voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.