Clock and data recovery device
US12267079B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 30, 2023 |
| Grant date | Apr 1, 2025 |
| Priority date | — |
| Expiry date | Jul 21, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock and data recovery device includes an equalizer that compensates for channel loss of input data, a phase detector that compares a data output from the equalizer with a clock fed back and outputs an up signal and a down signal, a charge pump that operates according to the up signal and the down signal and outputs a control signal, a loop filter that removes high-frequency components included in the control signal, a voltage controlled oscillator that changes a frequency of the clock and outputs a clock with changed frequency, and a data phase adjuster that synchronizes the clock output from the voltage controlled oscillator and the data output from the equalizer by adjusting a phase of the data output from the equalizer by receiving the up signal and the down signal output from the phase detector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.