Array substrate and display apparatus
US12268058B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 8, 2024 |
| Grant date | Apr 1, 2025 |
| Priority date | — |
| Expiry date | Apr 8, 2044 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/131
Abstract
An array substrate includes a base substrate; a pixel definition layer on the base substrate, the pixel definition layer defining subpixel apertures; and a spacer layer on a side of the pixel definition layer away from the base substrate, wherein the spacer layer includes first spacers arranged in a first array and second spacers arranged in a second array. Centers of subpixel apertures of two subpixels directly adjacent to an individual first spacer of the first spacers are arranged along a first spacer direction. Centers of subpixel apertures of two subpixels directly adjacent to an individual second spacer of the second spacers are arranged along a second spacer direction. The first spacer direction is different from the second spacer direction. A plurality of subpixels are arranged in an array of a plurality of rows along a first direction and a plurality of columns along a second direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.