Managing multi-phase clock signals for integrated circuit devices
US12271220B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2023 |
| Grant date | Apr 8, 2025 |
| Priority date | — |
| Expiry date | Dec 11, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, circuits, apparatus, and systems for managing multi-phase clocking signals for integrated circuit devices are provided. In one aspect, an integrated circuit device includes: a clock signal generator configured to generate a reference clock signal and a plurality of processing units coupled to the clock signal generator. At least one of the plurality of processing units includes: a phase generator configured to selectively generate at least two sets of multi-phase clock signals based on the reference clock signal and corresponding control signals, the at least two sets of multi-phase clock signals having different respective frequencies; and a computation unit configured to perform at least one computing function based on a selected one of the at least two sets of multi-phase clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.