Processor using host memory buffer and storage system including the processor
US12271622B2 · kind B2 · utility
0Cited by
14References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2022 |
| Grant date | Apr 8, 2025 |
| Priority date | — |
| Expiry date | Jul 29, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor configured to control a storage device includes at least one host write buffer generated based on device information of the storage device, and a control module configured to control the at least one host write buffer. The control module is further configured to store, in the at least one host write buffer, a plurality of write commands and merge the plurality of write commands to generate a merged write command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.