Semiconductor device comprising a drain back contact electrode, method of manufacturing the same, and semiconductor package structure
US12272743B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2020 |
| Grant date | Apr 8, 2025 |
| Priority date | — |
| Expiry date | Aug 25, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48247
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses a semiconductor device, a method of manufacturing the same, and a semiconductor package structure. The semiconductor device including a substrate, a multilayer semiconductor layer located on one side of the substrate, in which a Two-Dimensional Electron Gas is formed, a first source, a first gate and a first drain located on one side of the multilayer semiconductor layer and located within an active region of the multilayer semiconductor layer, the first gate being located between the first source and the first drain, and a back surface gate contact electrode located on one side of the substrate away from the multilayer semiconductor layer, wherein the first gate is electrically connected to the back surface gate contact electrode. A signal is provided from the back surface of the semiconductor device to the first gate, to reduce the parasitic inductance and parasitic resistance caused by the device during the packaging process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.