Randomly jittered under-sampling and phase sampling for time-frequency and frequency analyses in AFCI, GFCI, metering, and load recognition and disaggregation applications
US12273129B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 3, 2022 |
| Grant date | Apr 8, 2025 |
| Priority date | — |
| Expiry date | Mar 20, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0869
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods/systems employ randomly jittered under-sampling to reduce a sampling rate required to estimate the amplitude of high-frequency signals in circuit breakers, power meters, and other digital signal processing applications. The methods/systems can greatly reduce the nominal sampling rate for applications where RMS, peak and mean estimates of the signal are desired for both the entire band-limited signal and separate estimates for each frequency component. This can in turn result in large cost savings, as less complex and thus less expensive controllers and related components may be used to perform the sampling. As well, the methods/systems herein can provide reasonably accurate waveform estimates that allow additional cost savings in bill of materials (BOM) and printed circuit board assembly (PCBA) footprint and real-estate by eliminating the need for certain analog components, such as signal conditioning components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.