Patent · US Active

Synchronization of clock domains on a data network

US12273186B2 · kind B2 · utility

0Cited by

4References

20Claims

0Family size

Assignee

MARVELL ASIA PTE LTD · SG

Inventors

Olaf Mater · Blankenloch, DE
Lukas Reinbold · Hollfeld, DE
Xiongzhi Ning · Karlsruhe, DE
Steffen Dolling · Ditzingen, DE

Key dates

Filing date	Feb 22, 2022
Grant date	Apr 8, 2025
Priority date	—
Expiry date	Aug 27, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH04L7/0008
WIPO fieldTelecommunications
WIPO sectorElectrical engineering

Abstract

A network includes a first plurality of nodes operating in a first clock domain based on a first clock source, a second plurality of nodes operating in a second clock domain based on a second clock source, and synchronization circuitry accessible to both of the clock domains without requiring network traffic between the clock domains. The synchronization circuitry is configured to periodically calculate a drift rate between the time of day in the respective clock domains. Each node in one of the clock domains is configured to, when sending a message to a node in the other of the clock domains, calculate a time of day in the other of the clock domains based on an actual time of day in the one of the clock domains and the drift rate, and to include, in the message to the node in the other clock domain, the calculated time of day.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.