Memory device

US12274078B2 · kind B2 · utility

Assignees

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW
• National Taiwan University · TW

Inventors

• Jenn-Gwo Hwu · Taipei, TW
• Bo Chen · Beijing, CN
• Kuan-Wun LIN · 埔鹽鄉, TW

Key dates

• Filing date: Feb 2, 2023
• Grant date: Apr 8, 2025
• Expiry date: Mar 8, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/696

Abstract

A memory device includes a semiconductor substrate and a memory cell at a memory region of the semiconductor substrate. A memory cell includes a memory portion of the semiconductor substrate, a tunneling layer, a storage layer, a first electrode, and a second electrode. The tunneling layer is over the memory portion of the semiconductor substrate. The storage layer is over and in contact with the tunneling layer. The first electrode is over the storage layer. The second electrode is over and in contact with the tunneling layer but is spaced apart from the storage layer.