Computer-implemented method for optimizing the memory of a partitioned system
US12277333B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2023 |
| Grant date | Apr 15, 2025 |
| Priority date | — |
| Expiry date | Jun 15, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/173
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method for optimizing the memory of a partitioned system including multiple memories, at least one processing core, and at least one memory protection unit (MPU), each MPU including multiple registers. The method includes calculating run-time changes of each piece of data of a multitude of data which are to be processed by the processing core, with the respective piece of data being placed in each memory of the multiple memories based on access statistics for the respective piece of data, each piece of data of the multitude of data being assigned to one rights area or multiple rights areas; determining a placement of the data in the memories based on the calculated run-time changes; and allocating the multiple registers of the MPU for the certain placement of the data in the multiple memories, one register of the multiple registers identifying a memory area of the multiple memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.