Memory device with reset voltage control
US12277991B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2022 |
| Grant date | Apr 15, 2025 |
| Priority date | — |
| Expiry date | Jan 11, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are related to a memory device. In one aspect, the memory device includes a memory cell, a precharge circuit, a reset voltage control circuit, and a logic control circuit. In one aspect, the precharge circuit is configured to set a voltage of the bit line to a first voltage level. In one aspect, the reset voltage control circuit includes a transistor coupled to the bit line to set the voltage of the bit line to a second voltage level. The transistor can be arranged or operate as a diode. In one aspect, the logic control circuit is configured to cause the reset voltage control circuit to set the voltage of the bit line to the second voltage level during a reset phase and cause the precharge circuit to set the voltage of the bit line to the first voltage level during a precharge phase after the reset phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.