Semiconductor device
US12279435B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2022 |
| Grant date | Apr 15, 2025 |
| Priority date | — |
| Expiry date | May 22, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B51/40
Abstract
A semiconductor device includes first conductive lines provided on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate, second conductive lines spaced apart from the first conductive lines in a second direction parallel to the top surface of the substrate, a gate electrode disposed between the first and second conductive lines and extended in the first direction, a plurality of channel patterns provided to enclose a side surface of the gate electrode and spaced apart from each other in the first direction, a ferroelectric pattern between each of the channel patterns and the gate electrode, and a gate insulating pattern between each of the channel patterns and the ferroelectric pattern. Each of the channel patterns is connected to a corresponding one of the first conductive lines and a corresponding one of the second conductive lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.