LDMOS transistor and manufacturing method thereof
US12279442B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2021 |
| Grant date | Apr 15, 2025 |
| Priority date | — |
| Expiry date | Aug 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A LDMOS transistor and manufacturing method includes: forming an epitaxial layer on a substrate of a first doping type; forming a gate structure on an upper surface of the epitaxial layer; forming a source region of a second doping type in the epitaxial layer, the second doping type is opposite to the first doping type; forming a patterned first insulating layer on the upper surface of the epitaxial layer and the gate structure, and at least exposes part of the source region; forming a first conductive channel by using a sidewall as a mask, the first conductive channel extends from the source region to an upper surface of the substrate so as to connect the source region with the substrate; and forming a drain region of the second doping type in the epitaxial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.