Optimal memory slot size selection for random read miss IO operations
US12282656B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2024 |
| Grant date | Apr 22, 2025 |
| Priority date | — |
| Expiry date | Jan 3, 2044 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A random read miss slot size selection engine is configured to select between multiple memory slot sizes to optimize slot size allocations for random read miss IO operations. Upon receipt of an IO operation that is a random read miss IO operation, the slot size selection engine obtains a metadata page encompassing multiple entries in addition to an entry associated with the random read miss IO operation. The slot size selection engine performs a metadata temporal analysis to analyze temporal information associated with previous slot allocations identified in the metadata page. The slot size selection engine also performs a metadata spatial analysis to spatially analyze previous slot allocations to neighboring tracks identified in the metadata page. In response to a determination that the metadata page contains a threshold number of recent slot allocations, the spatial analysis is used to determine the slot size to allocate to the random read miss.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.